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micrf219a 300mhz to 450mhz ask/ook receiver with auto-poll, rssi, and squelch micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com march 2011 m9999-032511-a radiotech@micrel.com or (408) 944-0800 general description the micrf219a is a 300mhz to 450mhz super- heterodyne, image-reject, rf receiver with automatic gain control, ask/ook demodulator, analog rssi output, and integrated squelch features. it only requires a crystal and a minimum number of external components to implement. the micrf219a is ideal for low-cost, low-power, rke, tpms, and remote actuation applications. the micrf219a achieves ? 110dbm sensitivity at a bit rate of 1kbps with 0.1% ber. four demodulator filter bandwidths are selectable in binary steps from 1625hz to 13khz at 433.92mhz, allowing the device to support bit rates up to 20kbps. the device operates from a supply voltage of 3.0v to 3.6v, and ty pically consumes 4.3ma of supply current at 315mhz and 6.0ma at 433.92mhz. a shutdown mode reduces supply current to 0.1 a typical. the squelch feature decreases the activity on the data output pin until valid bits are detected while maintaining overall receiver sensitivity. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com . features ? ?110dbm sensitivity at 1kbps with 0.1% ber ? auto-polling mode with bit checking ? supports bit rates up to 20kbps at 433.92mhz ? 25db image-reject mixer ? no if filter required ? 60db analog rssi output range ? 3.0v to 3.6v supply voltage range ? 4.3ma supply current at 315mhz ? 6.0ma supply current at 434mhz ? 13 a supply current in sleep mode ? 0.1 a supply current in shutdown mode ? 16-pin qsop package (4.9mm x 6.0mm) ? ? 40 c to +105 c temperature range ? 3kv hbm esd rating ordering information part number temperature range package MICRF219AAYQS ?40c to +105 c 16-pin qsop _________________________________________________________________________________________________________________________ typical application micrf219a typical application circuit (433.92mhz, 1kbps)
micrel, inc. micrf219a march 2011 2 m9999-032511-a radiotech@micrel.com pin configuration MICRF219AAYQS pin description pin number pin name pin function 1 ro1 reference resonator connection to the pierce oscillator. may also be driven by external reference signal of 200mvp-p to 1.5v p-p amplitude maximum. internal capacitance of 7pf to gnd during normal operation. 2 gndrf ground connection for ant rf i nput. connect to pcb ground plane. 3 ant antenna input: rf signal input from antenna. internal ly ac coupled. it is recommended to use a matching network with an inductor to rf ground to improve esd protection. 4 gndrf ground connection for ant rf i nput. connect to pcb ground plane. 5 vdd positive supply connection for all chip functions. bypass with 0.1 f capacitor located as close to the vdd pin as possible. 6 sq squelch control logic-level input. an internal pull-up (5 a typical) pulls the logic-input high when the device is enabled. a logic low on sq squelches, or reduces, the random activity on do pin when there is no rf input signal. 7 sel0 tie this pin to vdd to ensure robust register programmi ng. use register bits d[ 4:3] to set demodulation bandwidth. 8 shdn shutdown control logic-level input. a logic-level low enables the device. a logic-level high places the device in low-power shutdown mode. an internal pull-up (5 a typical) pulls the logic input high. to ensure that the part starts up correctly, connect a 1 f capacitor from vdd to shdn, and a 50k ? resistor from shdn pin to gnd. after the supply voltage settles, appl y a high logic level voltage to shdn to turn the part off, then a low logic level voltage to turn the part on before programming or operating the device. 9 gnd ground connection for all chip functions exc ept for rf input. connect to pcb ground plane. 10 do data output. demo dulated data output. a current limited cmos output during normal operation, 25k ? pull- down is present when device is in shutdown. 11 sel1 tie this pin to vdd to ensure robust register programmi ng. use register bits d[ 4:3] to set demodulation bandwidth. or (408) 944-0800
micrel, inc. micrf219a march 2011 3 m9999-032511-a radiotech@micrel.com or (408) 944-0800 pin description (continued) pin number pin name pin function 12 cth demodulation threshold voltage integration capacitor. connect a 0.1 f capacitor from cth pin to gnd to provide a stable slicing threshold. 13 cagc agc filter capacitor. connect a capacitor from this pin to gnd. refer to the agc loop and cagc section for information on the capacitor value. 14 rssi received signal strength indicator. the voltage on this pin is an inversed amplifi ed version of the voltage on cagc. output is from a switched capacitor integrating op amp with 250 ? typical output impedance. 15 sclk programming clock input. 16 ro2 reference resonator connection to the pierce oscillator. internal capacitance of 7pf to gnd during normal operation.
micrel, inc. micrf219a march 2011 4 m9999-032511-a radiotech@micrel.com or (408) 944-0800 absolute maximum ratings (1) supply voltage (v dd )......................................................+5v ant, sq, sel0, sel1, sclk, shdn dc voltage. ........................ ? 0.3v to v dd + 0.3v junction temperature .............................................. +150 c lead temperature (solderi ng, 10sec.) ..................... +300c storage temperature (t s )......................... ? 65c to +150 c maximum receiver i nput power .............................+10dbm esd rating (3) ......................................................... 3kv hbm operating ratings (2) supply voltage (v dd ).................................... +3.0v to +3.6v ambient temperature (t a ) ........................ ?40c to +105c maximum input rf power...........................................0dbm receive modulation duty cycle ........................20% to 80% frequency range................................. 300mhz to 450mhz electrical characteristics (4) v dd = 3.3v, v shdn = 0v, sq = open, c cagc = 4.7f, c cth = 0.1f, unless otherwise noted. bold values indicate ?40c t a 105c. ?bit rate? refers to the encoded bit rate throughout this datasheet (see note 4). parameter condition min. typ. max. units continuous operation, f rf = 315mhz 4.3 operating supply current continuous operation, f rf = 433.92mhz 6.0 ma sleep current only sleep clock is on 13 a shutdown current v shdn = v dd 0.1 a receiver 433.92mhz, d[4:3] = 00, ber = 1% ? 112.5 433.92mhz, d[4:3] = 00, ber = 0.1% ? 110 315mhz, d[4:3] = 01, ber = 1% ? 112.5 conducted receiver sensitivity @ 1kbps (note 5) 315mhz, d[4:3] = 01, ber = 0.1% ? 110 dbm image rejection f image = f rf ? 2f if 25 db f rf = 315mhz 0.85 if center frequency (f if ) f rf = 433.92mhz 1.18 mhz f rf = 315mhz 235 ? 3db if bandwidth f rf = 433.92mhz 330 khz ? 40dbm rf input level 1.15 cagc voltage range ? 100dbm rf input level 1.55 v reference oscillator f rf = 315mhz 9.81713 reference oscillator frequency f rf = 433.92mhz 13.52313 mhz reference buffer input impedance ro1 when driven externally 1.6 k ? reference oscillator bias voltage ro2 1.15 v reference oscillator input range external input, ac couple to ro1 0.2 1.5 v p-p reference oscillator source current v ro1 = 0v 300 a
micrel, inc. micrf219a march 2011 5 m9999-032511-a radiotech@micrel.com electrical characteristics (4) (continued) v dd = 3.3v, v shdn = 0v, sq = open, c cagc = 4.7f, c cth = 0.1f, unless otherwise noted. bold values indicate ?40c t a 105c. ?bit rate? refers to the encoded bit rate throughout this datasheet (see note 4). parameter condition min. typ. max. units demodulator f ref = 9.81713mhz 165 cth source impedance, note 6 f ref = 13.52313mhz 120 k? cth leakage current in cth hold mode t a = +25oc t a = +105oc 1 10 na digital / control functions do pin output current as output source @ 0.8v dd as output sink @ 0.2v dd 300 680 a output rise time 600 output fall time 15pf load on do pin, transition time between 0.1v dd and 0.9v dd 200 ns input high voltage shdn, sq 0.8v dd v input low voltage shdn, sq 0.2v dd v output voltage high do 0.8v dd v output voltage low do 0.2v dd v rssi ? 110dbm rf input level 0.5 rssi dc output voltage range ? 50dbm rf input level 2.0 v rssi output current 5k load to gnd, ? 50dbm rf input level 400 a rssi output impedance 250 ? rssi response time d[4:3] = 00, rf input power stepped from no input to ? 50dbm 10 ms notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to fu nction outside of its operating rating. 3. device is esd sensitive. use appropriate esd precautions . exceeding the absolute maximu m rating may damage the device. 4. encoded bit rate is 1/(shortest pulse duration) that appears at micrf219a do pin: 5. in an on/off keyed (ook) signal, the signal level goes between a ?mark? level (when the rf signal is on) and a ?space? level (when the rf signal is off). sensitivity is defined as the input signal level when ?on? necessary to achieve a specified ber (bit error rat e). ber measured with the built-in bert function in agilent e4432b using pn9 sequence. sensitivity measurement values are obtained using an input matching network corresponding to 315mhz or 433.92mhz. 6. cth source impedance is inversely proportional to the refe rence frequency. in production te st, the typical source impedance value is verified with 12mhz reference frequency. or (408) 944-0800
micrel, inc. micrf219a march 2011 6 m9999-032511-a radiotech@micrel.com typical characteristics v dd = 3.3v, t a = +25 c, ber measured with pn9 sequence, unless otherwise noted. current vs. receiver frequency 3.5 4.0 4.5 5.0 5.5 6.0 6.5 300 325 350 375 400 425 450 receiver frequency (mhz) current (ma) current vs. supply voltage f rf = 433.92mhz 4.5 5.0 5.5 6.0 6.5 7.0 7.5 3.0 3.1 3.2 3.3 3.4 3.5 3.6 supply voltage (v) current (ma) +105oc +25oc -40oc current vs. supply voltage f rf = 315mhz 3.5 4.0 4.5 5.0 3.0 3.1 3.2 3.3 3.4 3.5 3.6 supply voltage (v) current (ma) +105oc +25oc -40oc cagc voltage vs. input power 1.0 1.2 1.4 1.6 1.8 2.0 -125 -100 -75 -50 -25 0 input power (dbm) cagc voltage (v) +105oc -40oc +25oc rssi vs. input power 0.0 0.5 1.0 1.5 2.0 2.5 -125 -100 -75 -50 -25 0 input power (dbm) rssi voltage (v) +105oc -40oc +25oc ber vs. input power d[4:3] = 00 0.1 1 10 -116 -115 -114 -113 -112 -111 -110 input power (dbm) ber (%) pn9 sequence @ 1kbps 315mhz 433.92mhz ` sensitivity at 1% ber d[4:3] = 00 -116 -114 -112 -110 -108 -106 -104 -102 -100 -98 024681012 bit rate (kbps) sensitivity (dbm) 315mhz 433.92mhz sensitivity at 1% ber d[4:3] = 01 -114 -112 -110 -108 -106 -104 -102 -100 0 3 6 9 12 15 18 21 bit rate (kbps) sensitivity (dbm) 315mhz 433.92mhz sensitivity at 1% ber d[4:3] = 10 -112 -110 -108 -106 -104 -102 -100 -98 0 10203040 bit rate (kbps) sensitivity (dbm) 315mhz 433.92mhz or (408) 944-0800
micrel, inc. micrf219a march 2011 7 m9999-032511-a radiotech@micrel.com typical characteristics (continued) v dd = 3.3v, t a = +25 c, ber measured with pn9 sequence, unless otherwise noted. sensitivity at 1% ber d[4:3] = 11 -110 -108 -106 -104 -102 -100 -98 0 1020304050 bit rate (kbps) sensitivity (dbm) 315mhz 433.92mhz bandpass filter attenuation f xtal = 13.52313mhz -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 433.6 433.8 434.0 434.2 input frequency (mhz) attentuation (db) bandpass filter attenuation f xtal = 9.81713mhz -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 314.8 314.9 315.0 315.1 315.2 input frequency (mhz) attentuation (db) sensitivity for 1% ber vs. frequency, f xtal = 13.52313mhz -120 -110 -100 -90 -80 -70 -60 -50 -40 419 424 429 434 439 444 449 input frequency (mhz) sensitivity (dbm) sensitivity for 1% ber vs. frequency, f xtal = 9.81713mhz -120 -110 -100 -90 -80 -70 -60 -50 -40 304 309 314 319 324 input frequency (mhz) sensitivity (dbm) or (408) 944-0800
micrel, inc. micrf219a march 2011 8 m9999-032511-a radiotech@micrel.com functional diagram figure 1. simplified block diagram or (408) 944-0800
micrel, inc. micrf219a march 2011 9 m9999-032511-a radiotech@micrel.com functional description the simplified block diagram (figure 1) illustrates the basic structure of the micrf219a receiver. it is made up of four sub-blocks: ? uhf down-converter ? ask/ook demodulator ? reference and control logic ? auto-poll circuitry outside the device, the micrf219a receiver requires just a few components to operate: a capacitor from cagc to gnd, a capacitor from cth to gnd, a reference crystal resonator with associated loading capacitors, lna input matching components, and a power-supply decoupling capacitor. receiver operation uhf downconverter the uhf down-converter has six sub-blocks: lna, mixers, synthesizer, image re ject filter, band pass filter and if amplifier. lna the rf input signal is ac-coupled into the gate of the lna input device. the lna configuration is a cascoded common source nmos amplifier. the amplified rf signal is then fed to the rf ports of two double balanced mixers. mixers and synthesizer the lo ports of the mixers are driven by quadrature local oscillator outputs from t he synthesizer block. the local oscillator signal from the synthesizer is placed on the low side of the desired rf signal (figure 2). the product of the incoming rf signal and local oscillator signal will yield the if frequency, which will be demodulated by the detector of the device. the image reject mixer suppresses the image frequency which is below the wanted signal by 2x the if frequency. the local oscillator frequency (f lo ) is set to 32x the crystal reference frequency (f ref ) via a phase-locked loop synthesizer with a fully-integrated loop filter: f lo = 32 x f ref eq. 1 micrf219a uses an if frequency scheme that scales the if frequency (f if ) with f ref according to: f if = f ref x 1000 87 eq. 2 therefore, the reference frequency f ref needed for a given desired rf frequency (f rf ) is approximately: f ref = f rf / (32 + 1000 87 ) eq. 3 figure 2. low-side injection local oscillator image-reject filter and band-pass filter the if ports of the mixer produce quadrature-down converted if signals. these if signals are low-pass filtered to remove higher frequency products prior to the image reject filter where they are combined to reject the image frequency. the if signal then passes through a third order band pass filter. the if bandwidth is 330khz @ 433.92mhz, and will scale with rf operating frequency according to: bw if = bw if@433.92 mhz ? ? ? ? ? ? 433.92 (mhz) freq operating eq. 4 these filters are fully integr ated inside the micrf219a. after filtering, four active gain controlled amplifier stages enhance the if signal to its proper level for demodulation. ask/ook demodulator the demodulator section is comprised of detector, programmable low pass filter, slicer, and agc comparator. or (408) 944-0800
micrel, inc. micrf219a march 2011 10 m9999-032511-a radiotech@micrel.com detector and programmable low-pass filter the demodulation starts with the detector removing the carrier from the if signal. post detection, the signal becomes baseband information. the low-pass filter further enhances the baseband signal. there are four selectable low-pass filter bw settings: 1625hz, 3250hz, 6500hz, and 13000hz for 433.92mhz operation. the low-pass filter bw is directly proportional to the crystal reference frequency, and hence rf operating frequency. filter bw values can be easily calculated by direct scaling. equation 5 illustrates filter demod bw calculation: bw operating freq = bw @433.92mhz ? ? ? ? ? ? 433.92 (mhz) freq operating eq. 5 it is very important to select a suitable low-pass filter bw setting for the required data rate to minimize bit error rate. use the operating curves that show ber vs. bit rates for different d[4:3] settings as a guide. this low-pass filter ? 3db corner, or the demodulation bw, is set at 13000hz @ 433.92mhz as default (assuming both sel0 and sel1 pins are connected to v dd ). the low-pass filter can be set by changing register bits d[4:3]. table 2 demonstrates the scaling for 315mhz rf frequency: d[4] d[3] low-pass filter bw maximum encoded bit rate 0 0 1625hz 2.5kbps 0 1 3250hz 5kbps 1 0 6500hz 10kbps 1 1 13000hz 20kbps or (408) 944-0800 table 1. low-pass filter selection @ 434mhz rf input d[4] d[3] low-pass filter bw maximum encoded bit rate 0 0 1170hz 1.8kbps 0 1 2350hz 3.6kbps 1 0 4700hz 7.2kbps 1 1 9400hz 14.4kbps table 2. low-pass filter selection @ 315mhz rf input slicer and cth the signal prior to the slicer, labeled ?audio signal? in figure 1, is still baseband analog signal. the data slicer converts the analog signal into ones and zeros based on 50% of the slicing threshold voltage built up in the cth capacitor. after the slicer, the signal is demodulated ook digital data. when there is only thermal noise at ant pin, the voltage level on cth pin is about 650mv. this voltage starts to drop when there is rf signal present. when the rf signal level is greater than ? 100dbm, the voltage is about 400mv. the value of the capacitor from cth pin to gnd is not critical to the sensitivity of micrf219a, although it should be large enough to provide a stable slicing level for the comparator. the value used in the evaluation board of 0.1 f is good for all bit rates from 500bps to 20kbps. cth hold mode if the internal demodulated signal (do? in figure 1) is at logic low for more than about 4msec, the chip automatically enters cth hold mode, which holds the voltage on cth pin constant even without rf input signal. this is useful in a transmission gap, or ?deadtime?, used in many encoding schemes. when the signal reappears, cth voltage does not need to re- settle, improving the time to output with no pulse width distortion, or time to good data (ttgd). agc loop and cagc the agc comparator monitors the signal amplitude from the output of the programmabl e low-pass filter. the agc loop in the chip regulates the signal at this point to be at a constant level when the input rf signal is within the agc loop dynamic range (about ? 115dbm to ? 40dbm). when the chip first turns on, the fast charge feature charges the cagc node up with 120a typical current. when the voltage on cagc increases, the gains of the mixer and if amplifier go up, increasing the amplitude of the audio signal (as labeled in figure 1), even with only thermal noise at the lna input. the fast-charge current is disabled when the audio signal crosses the slicing threshold, causing do? to go high, for the first time. when an rf signal is applied, a fast attack period ensues, when 600a current discharges the cagc node to reduce the gain to a proper level. once the loop reaches equilibrium, the fast attack current is disabled, leaving only 15a to discharge cagc or 1.5a to charge cagc. the fast attack current is enabled only when the rf signal increases faster than the ability of the agc loop to track it.
micrel, inc. micrf219a march 2011 11 m9999-032511-a radiotech@micrel.com the ability of the chip to track to a signal that decreased in strength is much slower, since only 1.5 a is available to charge cagc to increase the gain. when designing a transmitter that communicates with the micrf219a, ensure that the power level remains constant throughout the transmit burst. the value of cagc impacts the time to good data (ttgd), which is defined as the time when signal is first applied, to when the pulse width at do is within 10% of the steady state value. t he optimal value of cagc depends on the setting of the d4 and d3 bits. a smaller cagc value does not always result in a shorter ttgd. this is due to the loop dynamics, the fast discharge current being 600a, and the charge current being only 1.5a. for example, if d4 = d3 = 0, the low pass filter bandwidth is set to a minimum and cagc capacitance is too small, ttgd will be longer than if cagc capacitance is properly chosen. this is because when rf signal first appears, the fast discharge period will reduce v cagc very fast, lowering the gain of the mixer and if amplifier. but since the low pass filter bandwidth is low, it takes too long for the agc comparator to see a reduced level of the audio signal, so it can not stop the discharge current. this causes an undershoot in cagc voltage and a corresponding overshoot in rssi voltage. once cagc undershoots, it takes a long time for it to charge back up because the current available is only 1.5a. table 3 lists the recommended minimum cagc values for different d[4:3] settings to insure that the voltage on cagc does not undershoot. the recommendation also takes into account the behavior in auto-polling. if cagc is too small, the chip can have a tendency to false wake up (do releases even when there is no input signal). d4 d3 cagc value 0 0 4.7 f 0 1 2.2 f 1 0 1 f 1 1 1 f or (408) 944-0800 table 3. minimum suggested cagc values figure 3 illustrates what occurs if cagc capacitance is too small for a given d[4:3] setting. here, d[4:3] = 01, the capacitance on cagc pin is 0.47 f, and the rf input level is stepped from no signal to ? 100dbm. rssi voltage is shown instead of cagc voltage because rssi is a buffered version of cagc (with an inversion and amplification). probing cagc directly can affect the loop dynamics through resistive loading from a scope probe, especially in the state where only 1.5 a is available, whereas probing rssi does not. when rf signal is first applied, rssi voltage overshoots due to the fast discharge current on cagc, and the loop is too slow to stop this fast discharge current in time. since the voltage on cagc is too low, the audio signal level is lower than the slicing threshold (voltage on cth), and do pin is low. once the fast discharge current stops, only the small 1.5a charge current is available in settling the agc loop to the correct level, causing the recovery from cagc undershoot/rssi overshoot condition to be slow. as a result, ttgd is about 9.1ms. figure 3. rssi overshoot and slow ttgd (9.1ms) figure 4 shows the behavior with a larger capacitor on cagc pin (2.2 f), d[4:3] = 01. in this case, v cagc does not undershoot (rssi does not overshoot), and ttgd is relatively short at 1ms. figure 4. proper ttgd (1ms) with sufficient cagc
micrel, inc. micrf219a march 2011 12 m9999-032511-a radiotech@micrel.com reference oscillator the reference oscillator in the micrf219a (figure 5) uses a basic pierce crystal oscillator confi guration with mos transconductor. though the micrf219a has built- in load capacitors for the crystal oscillator, the external load capacitors are still required for tuning it to the right frequency. ro1 and ro2 are external pins of the micrf219a to connect the crystal to the reference oscillator. figure 5. reference oscillator circuit reference oscillator crystal frequency can be calculated using equation 3. for example, if f rf = 433.92mhz, f ref = 13.52313mhz. table 4 lists the values of reference frequencies at different popular rf frequencies. to operate the micrf219a with minimum offset, use proper loading capacitance recommended by the crystal manufacturer. rf input frequency (mhz) reference frequency (mhz) 315.0 9.81713* 390.0 12.15446 418.0 13.02708 433.92 13.52313* or (408) 944-0800 *empirically derived, slightly different from equation 3. table 4. reference frequency examples auto-polling the micrf219a can be programmed into an auto- polling mode by setting register bit d[15] to 1, where it monitors if there is a valid incoming rf signal while holding do low. in this mode, the chip goes between sleep state and polling state. in sleep state, only a low power sleep clock is on, resulting in very low current consumption of 13 a typical. the sleep time is programmable from 10ms to 1.28s. in a polling state, every block in the micrf219a is on, and the chip looks for signal with bit durations greater than a user- programmed value. this operation is subsequently called ?bit checking? in this datasheet. a ?valid bit? is a mark or space with duration that is longer than the bit check window. a ?bad bit? is a mark or space with duration that is shorter than the bit check window. the user can set different bit check window time to suit a particular signal by programming register bits d[11:9] as listed in the register programming section. the number of consecutive valid bits bef ore releasing do and exiting polling mode can also be set by register bits d[8:7]. figure 6. one bad bit followed by two valid bits during the bit checking operation, do is held low while the bit checker examines the pulse widths at the node labeled do? in figure 1. if there is no signal present and do? randomly chatters, the micrf219a returns to sleep after seeing 4 consecutive bad bits or after the watchdog timeout period. register bit d18 must be 0 for the watchdog timer to be active, otherwise the chip will continue to check until it sees 4 consecutive bad bits before going back to sleep. if the watchdog timer is active, set the number of consecutive valid bits such that do is released well within the watchdog timer period (65% of the watchdog time, at most). if the end of the watchdog timer coincides with the bit checking completion, the chip can go back to sleep and not respond to any valid signal the next time it wakes up. if this occurs, toggl e the shdn pin to turn the part off and on, and re-program the register bits. note that since do? randomly chatters with no signal present, the amount of time it takes for 4 consecutive bad bits to happen is random. therefore, the duration of polling time is random without signal. if enough consecutive valid bi ts are found, do is released and the micrf219a st ays on in the continuous receive mode. once the chip is in continuous receive mode, it will not go back to sleep automatically when rf signal is removed. the register bits must be programmed again to put the micrf219a back into auto-polling mode.
micrel, inc. micrf219a march 2011 13 m9999-032511-a radiotech@micrel.com or (408) 944-0800 squelch operation squelch operation can be used to limit the amount of activity on the do pin during normal operation, which is particularly useful when interrupts generated on do can interfere with correct operation. using squelch is not recommended for systems that can program the chip into auto-polling mode, since it suppresses more activity on do, and reduces the average current consumption. when squelch is enabled (sq pin tied low while register bit d17 is 0), do pin goes high once about every 100ms instead of chattering all the time when squelch is disabled. serial interface register programming there are twenty register bits in micrf219a. the functions are described in the following tables. d19 always set this bit to 0 d18 bit-check watchdog timeout sleep polling watchdog active - default limits the polling time to the following values: d[4:3] = 00 20ms d[4:3] = 01 10ms 0 d[4:3] = 1x 5ms 1 sleep polling watchdog disabled - unlimited poll period sq pin d17 squelch enable 0 0 squelch circuit enabled 0 1 squelch circuit disabled 1 0 squelch circuit disabled (default) 1 1 squelch circuit enabled d16 always set this bit to 0 d15 auto-poll enable 0 awake ? does not poll - default 1 auto-polls with sleep periods d14 d13 d12 set sleep time 0 0 0 10ms 0 0 1 20ms 0 1 0 40ms default 0 1 1 80ms 1 0 0 160ms 1 0 1 320ms 1 1 0 640ms 1 1 1 1280ms set bit-check window time (315 mhz, time in s) d11 d10 d9 d4=1 d3=1 d4=1 d3=0 d4=0 d3=1 d4=0 d3=0 0 0 0 98 196 393 785 0 0 1 92 183 367 733 0 1 0 85 170 341 681 0 1 1 79 157 314 629 1 0 0 72 144 288 577 1 0 1 66 131 262 525 1 1 0 59 118 236 473 1 1 1 53 105 210 420 set bit-check window time (433.92 mhz, time in s) d11 d10 d9 d4=1 d3=1 d4=1 d3=0 d4=0 d3=1 d4=0 d3=0 0 0 0 71 143 285 570 0 0 1 67 133 266 532 0 1 0 62 124 247 494 0 1 1 57 114 228 457 1 0 0 52 105 209 419 1 0 1 48 95 190 381 1 1 0 43 86 172 343 1 1 1 38 76 152 305 default value of d[11:9] = 111.
micrel, inc. micrf219a march 2011 14 m9999-032511-a radiotech@micrel.com d8 d7 set number of consecutive valid bits before releasing do 0 0 0 bit - default 0 1 4 1 0 8 1 1 16 or (408) 944-0800 d6 d5 set slice level 0 1 slice level 30% 1 0 slice level 40% 1 1 slice level 50% - default 0 0 slice level 60% d4 d3 demod bandwidth (at 433.92mhz) 0 0 1625hz 0 1 3250hz 1 0 6500hz 1 1 13000hz - default d0 d1 d2 desense* 0 x x no desense - default 1 0 0 6db desense 1 1 0 16db desense 1 0 1 30db desense 1 1 1 42db desense * in desense mode, a fixed gain cont rol voltage is applied to the mixer and variable gain amplifier, and the automatic gain adjustment loop is disabled. programming the device is ac complished by the use of pins do and sclk. normally, do (pin 10) is outputting data and needs to switch to an input pin made by the start sequence, as shown at figure 7. high at the sclk pin tri-states the do pin, enabling the external drive into the do pin with an initial low level. the start sequence is completed by taking sclk low, then high while do is low, followed by taking do high, then low while sclk is high. the serial interface is initialized and ready to receive the programming data. figure 7. serial interface start sequence bits are serially programmed starting with the most significant bit (msb = d19) if all bits are being programmed until the least significant bit (lsb =d0) for instance, if only the desense bits d0, d1, and d2 are being programmed, then these are the only bits that need to be programmed with the start sequence, d2, d1, d0, plus the stop sequence. or, if only the squelch bit d17 is needed, then the sequence must be from start sequence, d17 through d0 plus the stop sequence, making sure the other bits (besides d17) are programmed as needed. it is recommended that all parallel input pins (sel0, sel1, and sq) be kept high when using the serial interface. after the programming bits are finished, a stop sequen ce (as shown in figure 8) is required to end the mode and re-establish the do pin as an output again. to do so, the sclk pin is kept high while the do pin changes from low to high, then low again, followed by the sclk pin made low. timing of the programming bits are not critical, but should be kept as shown below: t1 < 0.1 us, time from sclk to convert do to input pin t6 > 0.1 us, sclk high time t7 > 0.1 us, sclk low time t2, t3, t4, t5, t8, t9, t10 > 0.1 us figure 8. serial interface stop sequence
micrel, inc. micrf219a march 2011 15 m9999-032511-a radiotech@micrel.com serial interface register loading examples see figures 9 to 11. (channel 1 is the do pin, and channel 2 is the sclk pin). figure 9. all bits d19 through d0 = 0 figure 10. all bits d19 through d0 = 1 figure 11. d[19:18] = 11, d[17:0] = all 0s or (408) 944-0800
micrel, inc. micrf219a march 2011 16 m9999-032511-a radiotech@micrel.com auto-poll programming example rf frequency 433.92mhz, bit rate 1kbps, bit width 1ms. d[19] = 0, agc fast attack enabled d[18] = 1, watchdog timer is off d[17] = 0, sq pin floating, squelch is off d[16] = 0 d[15] = 1, device is placed in autopoll d[14:12] = 100, sleep time 160ms d[11:9] = 011, bit check window time 457 s with d[4:3] = 00 d[8:7] = 10, number of consecutive valid bits is 8 d[6:5] = 11, slice level 50% d[4:3] = 00, demodulator bandwidth = 1.625khz d[2:0] = 000, no desense figure 12. auto-poll example from msb to lsb, see table 5: as noted in the absolute maximum ratings section, the voltage on sclk can go up to v dd + 0.3v without causing damage. but applying v dd + 0.3v to sclk can put the part in an unknown test mode. if this accidently happens, cycle the power supply to restore the part to normal operation d19 d18 d17 d16 d15 d14 d13 d12 0 1 0 0 1 1 0 0 d11 d10 d9 d8 d7 d6 d5 0 1 1 1 0 1 1 d4 d3 d2 d1 d0 0 0 0 0 0 table 5. auto-poll example bit sequence. or (408) 944-0800
micrel, inc. micrf219a march 2011 17 m9999-032511-a radiotech@micrel.com application information initial startup when supply voltage is initially applied, it should rise monotonically from 0v to 3.3v to ensure proper startup of the crystal oscillator and the pll. it should not have multiple bounces across 2.6v, which is the threshold of the undervoltage lockout (uvlo) circuit inside micrf219a. the shdn pin needs to have 50k ? resistor to gnd and a coupling capacitor to vdd as shown in the evaluation board schematic to ensure that the part starts up in shutdown mode first. then the micro controller can bring the shdn pin voltage down to turn the part on. length of preamble when using micrf219a in auto-polling mode, the preamble of the corresponding transmitter should be long enough to guarantee that the micrf219a becomes fully awake during the preamble portion of the burst. this way the entire data portion will be received. a good rule of thumb to use is: preamble length = 1.2 x [sleep time + 2 x watchdog timeout] the factor of 1.2 is to accommodate sleep time variation due to process shift. figure 13 shows an example of insufficient length preamble. micrf219a starts checking bits during the data portion of the burst, so by the time it becomes fully awake and releases do, part of the data portion is lost. in figure 14, the preamble length is sufficient. the chip wakes up during the preamble and is ready for the data portion. or (408) 944-0800 figure 13. preamble length too short figure 14. sufficient preamble length antenna and rf port connections the evaluation board offers two options of injecting the rf input signal: through a pcb antenna or through a 50 sma connector. the sma connection allows for conductive testing, or an external antenna. low-noise amplifier input matching capacitor c3 and inductor l2 form the ?l? shape input matching network to the sma connector. the capacitor cancels out the inductive portion of the net impedance after the shunt inductor, and provides additional attenuation for low-frequency outside band noise. the inductor is chosen to over resonate the net capacitance at the pin, leaving a net-positive reactance and increasing the real part of the impedance. it also provides additional esd protection for the antenna pin. the input impedance of the device is listed in table 6 to aid calculation of matching values. note that the net impedance at the pin is easily affected by component pads parasitic due to the high input impedance of the device. the numbers in table 6 does not include trace and component pad parasitic capacitance, which total about 0.75pf on the evaluation board. the matching components to the pcb antenna (l3 and c9) were empirically derived for best over-the-air reception range. frequency (mhz) z device ( ? ) 315 23 ? j290 390 14 ? j230 418 17 ? j216 433.92 12 ? j209 table 6. input impedance for the most used frequencies
micrel, inc. micrf219a march 2011 18 m9999-032511-a radiotech@micrel.com or (408) 944-0800 crystal selection the crystal resonator provides a reference clock for all the device internal circuits. crystal tolerance needs to be chosen such that the down-converted signal is always inside the if bandwidth of micrf219a. from this consideration, the tolerance should be 50ppm on both the transmitter and the micrf219a side. the esr should be less than 300 ? , and the temperature range of the crystal should match the range required by the application. with the abracon crystal listed in the bill of materials, a typical micrf219a crystal oscillator still starts up at 105oc with additional 400 ? series resistance. the oscillator of the micrf219a is a pierce-type oscillator. good care must be taken when laying out the printed circuit board. avoid long traces and place the ground plane on the top layer close to the refosc pins ro1 and ro2. when care is not taken in the layout, and the crystals used are not verified, the oscillator may not start or takes longer to start. time-to-good-data will be longer as well. pcb considerations and layout the micrf219a evaluation board is a good starting point for prototyping of most applications. the gerber files are downloadable from the micrel website and contain the remaining layers needed to fabricate this board. when copying or making one?s own boards, make the traces as short as possible. long traces alter the matching network and the values suggested are no longer valid. suggested matching values may vary due to pcb variations. a pcb tr ace 100 mils (2.5mm) long has about 1.1nh inductance. optimization should always be done with range tests. make sure the individual ground connection has a dedicated via rather then sharing a few of ground points by a single via. sharing ground via will increase t he ground path inductance. ground plane should be solid and with no sudden interruptions. avoid using ground plane on top layer next to the matching elements. it normally adds additional stray capacitance which changes the matching. do not use phenolic materials as they are conductive above 200mhz. typically, fr4 or better materials are recommended. the rf path should be as straight as possible to avoid loops and unnecessary turns. separate ground and v dd lines from other digital or switching power circuits (s uch microcontroller?etc). known sources of noise should be laid out as far as possible from the rf circuits. avoid unnecessary wide traces which would add more distribution capacitance (between top trace to bottom gnd plane) and alter the rf parameters.
micrel, inc. micrf219a march 2011 19 m9999-032511-a radiotech@micrel.com pcb recommended layout considerations micrf219a evaluation board assembly micrf219a evaluation board top layer micrf219a evaluation board bottom layer or (408) 944-0800
micrel, inc. micrf219a march 2011 20 m9999-032511-a radiotech@micrel.com micrf219a evaluation board schematic or (408) 944-0800
micrel, inc. micrf219a march 2011 21 m9999-032511-a radiotech@micrel.com or (408) 944-0800 bill of materials ? micrf219a evaluati on board: 433.92mhz item part number manufacturer description qty. c3 gqm1885c2a1r2c murata (1) 1.2pf 0.25pf, 0603 capacitor 1 c4 grm219r60j475k murata (1) 4.7 f 10%, 0805 capacitor 1 c5, c6 grm188r71e104k murata (1) 0.1 f 10%, 0603 capacitor 2 c7 np 0 c9 gqm1885c2a1r5c murata (1) 1.5pf 0.25pf, 0603 capacitor 1 c10, c11 grm1885c1h100j murata (1) 10pf 5%, 0603 capacitor 2 c12 grm188r61a105k murata (1) 1 f 10%, 0603 capacitor 1 j2 np, sma, edge conn. 0 j3 571-41031480 mouser (2) ampmodu breakaway headers 40 p(6pos) r/a header gold 1 l2 lqg18hn39nj00 murata (1) 39nh 5%, 0603 multi layer ceramic inductor 1 l3 lqg18hn33nj00 murata (1) 33nh 5%, 0603 multi layer ceramic inductor 1 r3 crcw040250kfkea vishay (3) 50k ? 5%, 0402 resistor 1 r4 crcw0402100kfkea vishay (3) 100k ? 5%, 0402 resistor 1 r5, r6 crcw04020000z vishay (3) 0 ? 5%,, 0402 resistor 2 r7, r8, r9 np 0 y1 abls-13.52313mhz-10j4y abracon (4) 13.52313mhz, hc49/us 1 y2 dsx321gk-13.52313mhz kds (5) np, (13.52313mhz, ? 40 c to +105 c), dsx321gk 0 u1 MICRF219AAYQS micrel, inc. (6) 300mhz to 450mhz ask/ook receiver with auto-poll, rssi, and squelch 1 notes: 1. murata: www.murata.com . 2. mouser: www.mouser.com . 3. vishay tel: www.vishay.com . 4. abracon: www.abracon.com . 5. kds: www.kds.info/index_en.htm . 6. micrel, inc.: www.micrel.com .
micrel, inc. micrf219a march 2011 22 m9999-032511-a radiotech@micrel.com or (408) 944-0800 bill of materials ? micrf219a evaluati on board: 315mhz item part number manufacturer description qty. c3 gqm1885c2a1r5c murata (1) 1.5pf 0.25pf, 0603 capacitor 1 c4 grm21br60j475k murata (1) 4.7 f 10%, 0805 capacitor 1 c5, c6 grm188r71e104k murata (1) 0.1 f 10%, 0603 capacitor 2 c7 np 0 c9 gqm1885c2a1r2c murata (1) 1.2pf 0.25pf, 0603 capacitor 1 c10, c11 grm1885c1h100j murata (1) 10pf 5%, 0603 capacitor 2 c12 grm188r61a105k murata (1) 1 f 10%, 0603 capacitor 1 j2 np, sma, edge conn. 0 j3 571-41031480 mouser (2) ampmodu breakaway header s 40 p(6pos) r/a header gold 1 l2, l3 lqg18hn68nj00 murata (1) 68nh 5%, 0603 multi layer ceramic inductor 2 r3 crcw040250kfkea vishay (3) 50k ? 5%, 0402 resistor 1 r4 crcw0402100kfkea vishay (3) 100k ? 5%, 0402 resistor 1 r5, r6 crcw04020000z vishay (3) 0 ? 5%,, 0402 resistor 2 r7, r8, r9 np 0 y1 abls-9.81713mhz-10j4y abracon (4) 9.81713mhz, hc49/us 1 y2 dsx321gk-9.81713mhz kds (5) np, (9.81713mhz, ? 40c to +105 c), dsx321gk 0 u1 MICRF219AAYQS micrel, inc. (6) 300mhz to 450mhz ask/ook receiver with auto-poll, rssi, and squelch 1 notes: 7. murata: www.murata.com . 8. mouser: www.mouser.com . 9. vishay tel: www.vishay.com . 10. abracon: www.abracon.com . 11. kds: www.kds.info/index_en.htm . 12. micrel, inc.: www.micrel.com .
micrel, inc. micrf219a march 2011 23 m9999-032511-a radiotech@micrel.com package information qsop16 package (aqs16) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2011 micrel, incorporated. or (408) 944-0800

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